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   Dynamic Systems, 2011, 21 (3), pp.307-338.
 
 - Short presentation: J. Forget, F. Boniol, D. Lesens, C. Pagetti [A Real-Time
-Architecture Design Language for Multi-Rate Embedded Control
-Systems](https://hal.science/hal-00688490v1).  In 25th ACM Symposium
-on Applied Computing (SAC'10), Sierre, Switzerland, March 22-26 2010.
+  Architecture Design Language for Multi-Rate Embedded Control
+  Systems](https://hal.science/hal-00688490v1).  In 25th ACM Symposium
+  on Applied Computing (SAC'10), Sierre, Switzerland, March 22-26 2010.
 
 - Complete language definition: J. Forget, [A Synchronous Language for
-Critical Embedded Systems with Multiple Real-Time
-Constraints](https://hal.science/tel-01942421).  PhD thesis, ISAE,
-Toulouse, France, November 2009.
+  Critical Embedded Systems with Multiple Real-Time
+  Constraints](https://hal.science/tel-01942421).  PhD thesis, ISAE,
+  Toulouse, France, November 2009.
 
 - AER compilation: C. Pagetti, J. Forget, H. Falk, D. Oehlert,
-A. Luppold. [Automated generation of time-predictable executables on
-multicore](https://hal.science/hal-01888728v1).  In 26th International
-Conference on Real-Time Networks and Systems, Oct 10-12 2018.
+  A. Luppold. [Automated generation of time-predictable executables on
+  multicore](https://hal.science/hal-01888728v1).  In 26th International
+  Conference on Real-Time Networks and Systems, Oct 10-12 2018.
+
+- WATERS challenge: F. Boniol, J. Forget, C. Pagetti.
+  [WATERS Industrial Challenge 2017 with Prelude](https://hal.science/hal-03690252v1).
+  In 8th International Workshop on Analysis Tools and Methodologies for
+  Embedded and Real-time Systems (WATERS 2017), Jun 2017, Dubrovnik,
+  Croatia.
 
 
 **Wiki**: https://gitlab.cristal.univ-lille.fr/forget/prelude/-/wikis/home